Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.

Lack of coordination between asynchronous resets and synchronous logic clocks leads to intermittent failures on power up. In this series of articles, we discuss the requirements and challenges of ...

For a useful primer on circuit design, see Optimize your DSPs for power and performance. To learn how power and performance vary with voltage and temperature, see Push performance and power beyond the ...

Computer architecture researchers evaluate key areas such as pipelining, organization, instruction issue, branching, and exception handling when considering asynchronous and synchronous design and ...

There are a number of interesting technologies to keep an eye on in term of how and when they could be adopted for use in SoC design today, some of which include gallium arsenide, GPGPUs, 3D ICs and ...

As the quest grows to manage power in everything from the handheld smart phone to sensors for automotive applications and contactless payment cards, designers are getting hungry for new design ...

Often, hybrid microservices architecture is overlooked when comparing synchronous and asynchronous communication, but it's an important model to know. Here's how these microservices architectures work ...

Hardly anything inside a computer would seem to be more basic, or more necessary, than the processor “clock”—the little crystal oscillator whose rhythmic ticks ultimately regulate everything the ...